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| STG5223 Low voltage 0.5 dual SPDT switch with break-before-make Features Ultra low power dissipation: ICC = 0.2 A (max.) at TA= 85 C Low ON resistance: - RON = 0.50 (max. TA = 25 C) at VCC = 4.3 V - RON = 0.55 (max. TA = 25 C) at VCC = 3.6 V - RON = 0.55 (max. TA = 25 C) at VCC = 3.0 V Wide operating voltage range: VCC (opr) = 1.65 V to 4.3 V single supply 5 V tolerant and 1.8 V compatible threshold on digital control input at VCC = 1.65 to 4.3 V Latch-up performance exceeds 300 mA (JESD 17) ESD performance: HBM > 2 kV (MIL STD 883 method 3015) QFN10L (1.8 x 1.4 mm) Description The STG5223 is a high-speed CMOS dual analog SPDT (single pole dual throw) switch or dual 2:1 multiplexer/demultiplexer bus switch fabricated in silicon gate C2MOS technology. It is designed to operate from 1.65 to 4.3 V, making this device ideal for portable applications. It offers very low ON resistance (<0.5 ) at VCC = 3.0 V. The nIN inputs are provided to control the switches. The switches nS1 are ON (connected to common ports Dn) when the nIN input is held high and OFF (high impedance state exists between the two ports) when nIN is held low. The switches nS2 are ON (connected to common ports Dn) when the nIN input is held low and OFF (high impedance state exists between the two ports) when IN is held high. Additional key features are fast switching speed, break-beforemake delay time and ultra low power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage immunity. \ Table 1. Device summary Order code STG5223QTR Package QFN10L (1.8 x 1.4 mm) Packaging Tape and reel January 2008 Rev 1 1/19 www.st.com 19 Contents STG5223 Contents 1 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 1.2 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 3 Input equivalent circuit and truth table . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.1 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 5 6 7 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2/19 STG5223 Pin settings 1 1.1 Pin settings Pin connection Figure 1. Pin connection (top through view) SEL2 D2 8 1 9 2 10 7 GND 6 9 5 8 2S2 1S2 4 7 SEL1 3 6 1 4 VCC 2 5 1S1 D1 2S1 10 3 1.2 Pin description Table 2. 1 2 3 4 5 GND 7 8 9 10 Pin description Symbol VCC 1S1 D1 SEL1 1S2 GND 2S2 SEL2 D2 2S1 Name and function Positive supply voltage Independent channel Common channel Control Independent channel Ground (0V) Independent channel Control Common channel Independent channel Pin number Warning: Exposed pad must be soldered to a floating plane. Do NOT connect to power or ground. 3/19 Input equivalent circuit and truth table STG5223 2 Input equivalent circuit and truth table Figure 2. Input equivalent circuit Table 3. Truth table IN H L Switch S1 ON OFF(1) Switch S2 OFF(1) ON 1. High impedance 4/19 STG5223 Maximum rating 3 Maximum rating Stressing the device above the rating listed in the "Absolute maximum ratings" table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 4. Symbol VCC VI VIC VO IIKC IIK IOK IO IOP ICC or IGND PD TSTG TL Supply voltage DC input voltage DC control input voltage DC output voltage DC input diode current on control pin (VSEL < 0 V) DC input diode current (VIN < 0 V) DC output diode current DC output current DC output current peak (pulse at 1 ms, 10% duty cycle) DC VCC or ground current Power dissipation at TA=70 C(1) Storage temperature Lead temperature (10 sec) Absolute maximum ratings Parameter Value -0.5 to 5.5 -0.5 to VCC + 0.5 -0.5 to 5.5 -0.5 to VCC + 0.5 - 50 50 20 300 500 100 1120 -65 to 150 300 Unit V V V V mA mA mA mA mA mA mW C C 1. Derate above 70 C by 18.5 mW/ C 5/19 Maximum rating STG5223 3.1 Recommended operating conditions Table 5. Symbol VCC VI VIC VO Top Supply voltage Input voltage Control input voltage Output voltage Operating temperature VCC = 1.65 V to 2.7 V dt/dv Input rise and fall time control input VCC = 3.0 V to 4.3 V 0 to 10 Recommended operating conditions Parameter Value 1.65 to 4.3 0 to VCC 0 to 4.3 0 to VCC -40 to 85 0 to 20 ns/V Unit V V V V C 6/19 STG5223 Electrical characteristics 4 Electrical characteristics Table 6. Symbol DC specifications Value Parameter VCC (V) Test condition TA = 25 C Min 1.65 -1.95 High level input voltage 2.3 -2.5 2.7 -3.0 3.0 -3.6 4.3 1.65 -1.95 2.3 -2.5 Low level input voltage 2.7 -3.0 3.0 -3.6 4.3 4.3 3.6 Switch ON resistance VS = 0 V to VCC IS = 100 mA 0.45 0.50 0.50 0.60 0.90 VS = 1.5 V IS = 100 mA 0.1 0.15 0.15 VS = 1.5 V IS = 100 mA 0.15 0.15 0.20 0.35 VS = 0.3 or 4 V 0.20 0.20 0.20 0.20 0.25 0.45 20 0.05 0.05 0.20 0.20 0.20 0.20 0.25 0.45 100 1 0.2 nA 0.65 VCC 1.2 1.3 1.4 1.5 0.25 0.25 0.25 0.30 0.40 0.50 0.55 0.55 0.70 1.0 Typ Max -40 to 85 C Unit Min 0.65 VCC 1.2 1.3 1.4 1.5 0.25 0.25 0.25 0.30 0.40 0.55 0.65 0.65 0.80 1.1 V V Max VIH VIL RON 3.0 2.3 1.8 RON ON resistance match between channels (1) 2.7 4.3 3.6 RFLAT ON resistance flatness (2) 3.0 2.7 2.3 1.65 IOFF OFF state leakage current (nSn), (Dn) Input leakage current Quiescent supply current 4.3 IIN ICC 0 -4.3 1.65 -4.3 VSEL = 0 to 4.3 V VSEL = VCC or GND A A 7/19 Electrical characteristics Table 6. Symbol STG5223 DC specifications (continued) Value Parameter VCC (V) Test condition TA = 25 C Min V1IN, V2IN = 1.65 V 4.3 V1IN, V2IN = 1.80 V V1IN, V2IN = 2.60 V Typ 37 33 12 Max 50 40 20 -40 to 85 C Unit Min Max 100 50 30 A ICCLV Quiescent supply current low voltage driving 1. RON = RON(max) - RON(min). 2. Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges. Table 7. Symbol AC electrical characteristics (CL= 35 pF, RL= 50 , tr= tf 5 ns) Value Parameter VCC (V) 1.65 - -1.95 Test condition TA = 25 C Min Typ 0.30 0.25 ns 0.20 0.20 120 65 VS = 1.5 V 42 40 45 18 VS = 1.5 V 16 15 2 CL = 35 pF RL = 50 VS = 1.5 V 2 2 2 17 10 ns 8 7 30 30 30 40 ns 40 40 85 55 55 90 ns 65 65 Max -40 to 85 C Min Max Unit tPLH, tPHL Propagation delay 2.3 - -2.7 3.0 - -3.3 3.6 - -4.3 1.65 - -1.95 VS = 0.8 V tON Turn-ON time 2.3 - -2.7 3.0 - -3.3 3.6 - -4.3 1.65 - -1.95 VS = 0.8 V tOFF Turn-OFF time 2.3 - -2.7 3.0 - -3.3 3.6 - -4.3 1.65 - -1.95 tD Break-beforemake time delay 2.3 - -2.7 3.0 - -3.3 3.6 - -4.3 8/19 STG5223 Table 7. Symbol Electrical characteristics AC electrical characteristics (continued) (CL= 35 pF, RL= 50 , tr= tf 5 ns) Value Parameter VCC (V) 1.65 - -1.95 Q Charge injection 2.3 - -2.7 3.0 - -3.3 3.6 - -4.3 Test condition TA = 25 C Min CL = 100 pF RL = 1 M VGEN = 0 V RGEN = 0 Typ 43 51 pC 51 49 Max -40 to 85 C Min Max Unit Table 8. Symbol Analog switch characteristics (CL = 5 pF, RL = 50 , TA = 25 C) Value Parameter VCC (V) Test condition TA = 25 C Min Typ -66 -72 Max -40 to 85 C Min Max dB dB Unit OIRR Xtalk Off isolation (1) Crosstalk 1.65 - -4.3 1.65 - -4.3 VS = 1 VRMS f = 100 kHz VS = 1 VRMS f = 100 kHz RL = 600 VSEL = 2 VPP f = 20 Hz to 20 kHz THD Total harmonic distortion 2.3 - -4.3 0.02 % BW CIN -3dB bandwidth 1.65 - -4.3 RL = 50 Control pin input capacitance Sn port capacitance when switch is enabled Sn port capacitance when switch is disabled D port capacitance when the switch is enabled 55 7 MHz CON 3.3 f = 1 MHz 114 pF 3.3 f = 1 MHz 40 COFF CD 3.3 f = 1 MHz 114 1. Off isolation = 20 Log10 (VD/VS), VD = output. VS = input at off switch 9/19 Test circuit STG5223 5 Test circuit Figure 3. ON resistance I DS V V CC S1 D VS S2 IN GND GND CS14071 Figure 4. OFF leakage V CC I S(OFF) D I D(OFF) A V SS A V D S2 IN V CC GND CS14081 10/19 STG5223 Figure 5. OFF isolation V CC Test circuit S1 50 V OUT S2 IN GND VS GND CS00381 Figure 6. Bandwidth V CC D S1 V OUT S2 V IN CC GND CS00371 11/19 Test circuit Figure 7. Channel-to-channel crosstalk STG5223 CS14091 Figure 8. Test circuit 1. CL = 5/35 pF or equivalent (includes jig and probe capacitance) 2. RL = 50 or equivalent 3. RT = ZOUT of pulse generator (typically 50 ) 12/19 STG5223 Test circuit Figure 9. Break-before-make time delay Figure 10. Charge injection (VGEN = 0, RGEN = 0 RL = 1 M CL = 100 pF) , , Figure 11. Turn on, turn off delay time VCC S1 D VOUT RL S2 CL IN V IN GND 13/19 Package mechanical data STG5223 6 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 12. QFN10L (1.8 x 1.4 x 0.5 mm) package outline 14/19 STG5223 Table 9. QFN10L (1.8 x 1.4 x 0.5 mm) mechanical data millimeters Symbol Min A A1 A3 b D E e L L1 0.35 0.45 0.15 1.75 1.35 0.45 0 Typ 0.50 0.02 0.127 0.20 1.80 1.40 0.40 0.40 0.50 Package mechanical data Max 0.55 0.05 0.25 1.85 1.45 0.45 0.55 Figure 13. QFN10L (1.8 x 1.4 x 0.5 mm) recommended footprint 15/19 Package mechanical data STG5223 Figure 14. QFN10L (1.8 x 1.4 mm) carrier tape Figure 15. QFN10L (1.8 x 1.4 mm) reel information - back view 16/19 STG5223 Figure 16. Package mechanical data QFN10L (1.8 x 1.4 mm) reel information - front side 17/19 Revision history STG5223 7 Revision history Table 10. Date 10-Jan-2008 Document revision history Revision 1 Initial release. Changes 18/19 STG5223 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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